1. Field of the Invention
This invention relates to modifying memory device voltage and more particularly relates to modifying memory device voltage and performance in response to changes in memory device stress.
2. Description of the Related Art
A data processing device (“DPD”) such as a server, computer workstation, router, mainframe computer, and the like typically uses a memory device such as dynamic random access memory (“DRAM”), static random access memory (“SRAM”), and the like to store instructions and data. For example, a processor module of the DPD may read and execute instructions from the memory device and read and process data from the memory device.
The performance of the memory device directly affects the performance of the DPD. For example, a memory device with fast timing is able to deliver more instructions and data to the processor module during a specified time interval than a memory device with slow timing. As a result, the processor module may execute more instructions and process more data, increasing overall DPD performance.
The performance of the memory device is typically related to the voltage of the memory device. For example, the memory device may have faster timing with a voltage of three point three volts (3.3 V) than with a voltage of three volts (3 V). Thus increasing memory device voltage increases potential performance while decreasing the memory device voltage decreases potential performance.
Unfortunately, operating the memory device at a higher voltage may have one or more adverse consequences. For example, a higher memory device voltage increases the heat generated by the memory device. As a result, the DPD may require more expensive cooling devices to maintain the desired temperature for the DPD. Increasing the voltage and timing for the memory device may also increase the stress on elements of the memory device, increasing the risk of failure. For example, one or more semiconductor gates comprising the memory device may be significantly more likely to fail at a higher voltage and temperature than at a lower voltage and temperature. As a result, memory device voltages have typically been set at conservative levels to avoid high temperatures or the risk of device failure. Yet the benefits of higher voltage and performance are significant, making higher voltage performance attractive if the negative consequences may be mitigated.
From the foregoing discussion, it should be apparent that a need exists for an apparatus, system, and method that modify the voltage and performance of a memory device responsive to memory device stress. Beneficially, such an apparatus, system, and method would allow a DPD to take advantage of higher memory voltage while mitigating potentially negative consequences.